TLA5000 Series Logic Analyzers

TLA5201 • TLA5202 • TLA5203 • TLA5204

Features & Benefits

• 500 ps (2 GHz)/32 Mb timing record length to capture intermittent events over a wide time window
• 125 ps-resolution MagniVu™ acquisition simultaneous with timing or state acquisition to find elusive timing problems quickly, without double probing
• Glitch and setup/hold violation triggering and display to find and display elusive hardware problems
• 235 MHz state acquisition provides analysis of high-speed synchronous digital circuits
• iView™ time-correlated digital-analog view to clearly see how analog anomalies are affecting your digital signals
• 34/68/102/136 channel configurations offer flexible solutions to fit any budget
• Microsoft Windows XP Professional PC controller provides familiar user interface with network connectivity
• Remotely control and monitor the TLA over the network using either hosted mode or via built-in Windows XP remote desktop

Applications

• Digital hardware verification and debug
• Monitoring and measurement of digital hardware performance
• Single microprocessor or bus debug

TLA5000 Series logic analyzers combine debug power with simplicity and affordability

The affordable TLA5000 Series logic analyzers make high-speed timing resolution, fast state acquisition, long record length, and sophisticated triggering available to any digital designer who needs to identify initialization failures, operation crashes and intermittent operation. For first-time as well as experienced logic analyzer users, the TLA5000 Series is ideal for single-bus timing and state analysis. An intuitive user interface, familiar Windows-based desktop and OpenChoice® networking and analysis features make the TLA5000 Series logic analyzers easy to network into your design environment.

500 ps timing resolution and 32 Mb record length with simultaneous 125 ps MagniVu timing resolution within each acquisition means you can measure digital signal timing on increasingly faster signals with confidence. With MagniVu timing resolution, find difficult problems such as digital logic errors, glitches, setup/hold violations, and crosstalk quickly. Use setup/hold violation triggering and display to validate setup/hold performance of digital devices.

Today, most designs can have both digital and analog anomalies. With iView™ time-correlated digital-analog view, you’ll clearly see how analog anomalies are affecting your digital signals—right on your logic analyzer display.